CPU & SIMD
Runtime dispatch and vector kernels.
01Instruction selection#
Hardware features and OS XCR0 are checked. The AVX2 path uses FMA. With NEXUS_MODEL_ENABLE_AVX512, AVX-512F code is compiled; ReLU and dot take that path only when the CPU reports AVX-512. AVX-512 is not selected on the Ryzen 7 5800H. linear_forward, including the AVX-512 wrapper, calls the blocked AVX2 engine. This repository’s Linear tile is 6×16. The GEMM kernel kept on the 2026-10-21 evening competitor protocol is avx2-4x16.
02Scalar reference#
kernels::set_force_scalar(true) selects the reference path; false restores automatic selection. Compilers may still vectorize scalar loops. Table selection is atomic; keep it fixed during a measurement for reproducibility.
#include <nexus_model/core/kernels.hpp>kernels::set_force_scalar(true);// Reference measurementkernels::set_force_scalar(false);03Build and portability#
MSVC uses /arch:AVX2 and /arch:AVX512; GCC/Clang use -mavx2/-mfma and -mavx512f. Release does not apply -march=native globally; ISA flags are confined to the relevant source files.
04Measured improvement#
Linear [32,256]→[32,256] forward+backward times are in the 2026-09-29 CPU table. That is one measurement. The evening of 2026-10-21 is a separate protocol: GEMM kept avx2-4x16, N=2048 Nexus 330/362/369 GFLOPS, TensorFlow 389. CPU Conv2d was behind PyTorch at 31.6 GFLOPS; Nexus was about 4.9 to 6.8 GFLOPS. Depthwise AVX was ahead of PyTorch 4.93 and TensorFlow 0.688. AVX-512 is not selected on this Ryzen. There is no world ranking.